Tic-tac-toe with fpga board

When: Fall 2015 (4 weeks)               Where: University of Southern California                   Team Size: 2


Role: Programmer                                Platform: FPGA Board & Monitor                                         



Description: I, partnered with Veda, decided to create the game Tic-Tac-Toe for two players to play against each other. We did so by coding our game in Verilog, simulating and debugging the code in Model-Sim, implementing our design on a Nexys-2 FPGA board and projecting our game onto a VGA Monitor. We created a 3 by 3 grid with 9 spaces leading to each player having 9 different possibilities to win the game by connecting 3 pieces of theirs in a row, either vertically, horizontally or diagonally,


Design of Implementation:


The project was created runs at the full stock speed of 100MHz frequency. The VGA monitor works best at this clock speed and is the reason why we chose such a high frequency.


II.Block-Level Description

The block level diagram illustrated below explains in simpler terms how our program has a top file with three modules. The first of which is the main state machine, which outputs R, G and B values which corresponds to the colors that could be used in the VGA monitor as well as the SSDs that would be shown on the FPGA. The second is the
hvsync generator, which determines where the objects we drew will be placed on the VGA monitor with dimensions of 640*480 pixels, The last is the Button Debouncer, which is used to help when pressing on the mechanical buttons to allow for the oscillations, or the bouncing up and down, that would normally occur to even out and allow for the correct signal to be transmitted through. if we did not include the debouncing module, the program could misread the oscillations as the Player pressing the mechanical button several times when they instead meant to press it once.


Nexys-2 FPGA board

State Machine

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Block-level Diagram


Game Over Screen